ADMUX Register

This Register is used to select :

1. Reference voltage source to ADC (AREF)
2. Analog port channel to used for conversion (PC0.....PC5)
3. How the result will be stored in Data Register either Left justified or Right justified.

                                                           Since the Digital value of corresponding Analog vary from 0 to 1024, value can't be stored in a single register that's why two registers (ADCH & ADCL) are used to store that digital value.

REFS1 and REFS0 (REFerence Selection bit 1 to 0) : this bits are used to determine what reference voltage source to be used for AD Conversion. It can be either internal 2.56 V or through external AREF (Analog REFerence) pin, following table sows the bit configuration for different reference source :

Click on the link below to see schematic of different type reference source

• 0, 0      AREF, Internal Vref turned off
• 0, 1      AVcc with external capacitor at AREF pin
• 1, 1       Internal 2.56 V Voltage Reference with external capacitor at AREF pin 

ADLAR (ADc Left Adjusted Result) : Once the conversion is completed result is stored in ADCH & ADCL Register, this result can be either left justified or Right justified if ADLAR bit is set (means written 1) then it's left adjusted and clearing it will right justify the result. By default bit is cleared and right justified.

• if ADLAR = 0 Result is right justified

• if ADLAR = 1 Result is left justified.

MUX3 to MUX0 (multiplexer) : This bits are used to select particular analog input channel. The table shows bits to be set to enable any particular pin (ADC5 ....ADC0)

Note that bit 4 (MUX3) is not used in Atmega8 as there are only 6 analog pins (three bits are sufficient to point the address). However there are another AVR device which have more than 8 analog pins for which the fourth bit is utilized, Also note that if bits are changed during a conversion, the change will not go in effect until conversion completes 

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